XMC Module with Artix-7 FPGA XMC-7A50-AP323

The XMC-7A50-AP323 offers a reconfigurable Xilinx Artix-7 FPGA along with 48 TTL Digital I/O Channels.  The FPGA provides a user configurable bridge between the host processor and a custom digital interface via PCI Express.

Making it perfect for COTS applications especially signal processing.

The Acromag XMC-7A50-AP323 is a XMC Module with Artix-7 FPGA.  Firstly, it offers 48 TTL channels.  However, other build options are available such as:

  • Custom: Other I/O combinations are possible, contact Acromag for more information
  • Build A: 24 x EIA-485 / 422 Channels
  • Build B: 24 x TTL and 12 x EIA-485/422 Channels
  • Build C: 24 x LVDS Channels


Secondly, the XMC modules combine the user customisable FPGA with Digital I/O and high performance analog inputs.  Resulting in high density signal processing.

Thirdly, the analog inputs monitor 20 differential or 40 single ended channels.  Therefore, software or an external hardware input can trigger A/D conversions for synchronisation to external events.  Also the on-board precision voltage references allow accurate software calibration of the module without external instruments.

Finally, the engineering design kit is very helpful.  It provides users with basic information to allow them to develop custom FPGA firmware to download to the Xilinx.  However, users should be fluent in using Xilinx Vivado® design tools.

Features of XMC Module with Artix-7 FPGA XMC-7A50-AP323 include:

FPGA Digital I/O

  • Reconfigurable Xilinx FPGA
  • High channel count digital interface:
  • TTL, RS485, and LVDS interface options
  • 32Mb quad serial flash memory
  • 52,160 logic cells
  • 65,200 Flip flops
  • 2,700 kb block RAM
  • 120 DSP slices
  • External LVTTL clock input
  • Long distance data transmission
  • Example design
  • Power up and system reset is failsafe


Analog Input

  • 20 differential or 40 single-ended inputs
  • Flexible scan control
  • 16-bit A/D resolution
  • 8μs conversion time
  • FIFO buffer with 16K sample memory
  • Interrupt upon FIFIO threshold condition
  • FIFO full, empty and threshold reached flags
  • Programmable channel conversion control
  • Programmable conversion timer
  • Several scanning modes
  • External trigger



  • Wide temperature range
  • Conduction cooling options
  • Software development tools for VxWorks®, Linux®, and Windows® environments


For more information, contact us.